diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2018-03-13 15:34:56 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-03-19 18:23:24 +0000 |
| commit | 1bcb4d16bb0b4ad2fdde8802ccd0598cdf020fc7 (patch) | |
| tree | 40dc758c6784c33d8d77dcf7ddea78b16d9e6e84 /hw/arm/bcm2836.c | |
| parent | 0fd74f03ed7e8c95279a9af2b684dd65713ca03f (diff) | |
hw/arm/bcm2836: Use correct affinity values for BCM2837
The BCM2837 sets the Aff1 field of the MPIDR affinity values for the
CPUs to 0, whereas the BCM2836 uses 0xf. Set this correctly, as it
is required for Linux to boot.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andrew Baumann <Andrew.Baumann@microsoft.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180313153458.26822-8-peter.maydell@linaro.org
Diffstat (limited to 'hw/arm/bcm2836.c')
| -rw-r--r-- | hw/arm/bcm2836.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index 07d2705f96..d775a33969 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -25,14 +25,17 @@ struct BCM283XInfo { const char *name; + int clusterid; }; static const BCM283XInfo bcm283x_socs[] = { { .name = TYPE_BCM2836, + .clusterid = 0xf, }, { .name = TYPE_BCM2837, + .clusterid = 0x0, }, }; @@ -58,6 +61,8 @@ static void bcm2836_init(Object *obj) static void bcm2836_realize(DeviceState *dev, Error **errp) { BCM283XState *s = BCM283X(dev); + BCM283XClass *bc = BCM283X_GET_CLASS(dev); + const BCM283XInfo *info = bc->info; Object *obj; Error *err = NULL; int n; @@ -116,10 +121,8 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0)); for (n = 0; n < BCM283X_NCPUS; n++) { - /* Mirror bcm2836, which has clusterid set to 0xf - * TODO: this should be converted to a property of ARM_CPU - */ - s->cpus[n].mp_affinity = 0xF00 | n; + /* TODO: this should be converted to a property of ARM_CPU */ + s->cpus[n].mp_affinity = (info->clusterid << 8) | n; /* set periphbase/CBAR value for CPU-local registers */ object_property_set_int(OBJECT(&s->cpus[n]), |