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authorCédric Le Goater <clg@kaod.org>2016-12-27 14:59:28 +0000
committerPeter Maydell <peter.maydell@linaro.org>2016-12-27 14:59:28 +0000
commit0584d3c33f70445085d3f223015c67dfcea97ba3 (patch)
tree977c6c12575f8971e015efa1fb6fcbbec7d9749c /hw/arm/aspeed_soc.c
parentc491e1521f20a44517c68ea920f10c03b864c140 (diff)
aspeed/smc: improve segment register support
The HW does not enforce all the rules in the specs and allows a few "curious" setups like zero size segments and overlaps. So change the model to be in sync but keep the warnings which are always interesting for debug. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 1480434248-27138-13-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/aspeed_soc.c')
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