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authorPeter Maydell <peter.maydell@linaro.org>2019-02-01 14:55:41 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-02-01 14:55:41 +0000
commit66647809f56cc8c7c8a39032e54106f3cd4283f4 (patch)
treeb46b2c29eebbaaa24d17e935a2a36c1b39df850a /hw/arm/armv7m.c
parente4c81e3a451f9ce692f2644b395facbbdc3891cb (diff)
armv7m: Pass through start-powered-off CPU property
Expose "start-powered-off" as a property of the ARMv7M container, which we just pass through to the CPU object in the same way that we do for "init-svtor" and "idau". (We want this for the SSE-200, which powers up only the first CPU at reset and leaves the second powered down.) As with the other CPU properties here, we can't just use alias properties, because the CPU QOM object is not created until armv7m realize time. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190121185118.18550-4-peter.maydell@linaro.org
Diffstat (limited to 'hw/arm/armv7m.c')
-rw-r--r--hw/arm/armv7m.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 0f2c8e066c..adae11e76e 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -182,6 +182,14 @@ static void armv7m_realize(DeviceState *dev, Error **errp)
return;
}
}
+ if (object_property_find(OBJECT(s->cpu), "start-powered-off", NULL)) {
+ object_property_set_bool(OBJECT(s->cpu), s->start_powered_off,
+ "start-powered-off", &err);
+ if (err != NULL) {
+ error_propagate(errp, err);
+ return;
+ }
+ }
/*
* Tell the CPU where the NVIC is; it will fail realize if it doesn't
@@ -250,6 +258,8 @@ static Property armv7m_properties[] = {
DEFINE_PROP_LINK("idau", ARMv7MState, idau, TYPE_IDAU_INTERFACE, Object *),
DEFINE_PROP_UINT32("init-svtor", ARMv7MState, init_svtor, 0),
DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false),
+ DEFINE_PROP_BOOL("start-powered-off", ARMv7MState, start_powered_off,
+ false),
DEFINE_PROP_END_OF_LIST(),
};