diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2021-08-12 10:33:38 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-01 11:08:19 +0100 |
| commit | 712bd17f3e6c5b33ad1e33661350164c9f8468bf (patch) | |
| tree | 36172f5bfb64ea18b91774a03fbbdc1043e9e911 /hw/arm/armsse.c | |
| parent | d5093d961585f02126191951ded9b90dbc52883b (diff) | |
armsse: Wire up systick cpuclk clock
Wire up the cpuclk for the systick devices to the SSE object's
existing mainclk clock.
We do not wire up the refclk because the SSE subsystems do not
provide a refclk. (This is documented in the IoTKit and SSE-200
TRMs; the SSE-300 TRM doesn't mention it but we assume it follows the
same approach.) When we update the systick device later to honour "no
refclk connected" this will fix a minor emulation inaccuracy for the
SSE-based boards.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Luc Michel <luc@lmichel.fr>
Message-id: 20210812093356.1946-8-peter.maydell@linaro.org
Diffstat (limited to 'hw/arm/armsse.c')
| -rw-r--r-- | hw/arm/armsse.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index a1456cb0f4..70b52c3d4b 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -995,6 +995,9 @@ static void armsse_realize(DeviceState *dev, Error **errp) int j; char *gpioname; + qdev_connect_clock_in(cpudev, "cpuclk", s->mainclk); + /* The SSE subsystems do not wire up a systick refclk */ + qdev_prop_set_uint32(cpudev, "num-irq", s->exp_numirq + NUM_SSE_IRQS); /* * In real hardware the initial Secure VTOR is set from the INITSVTOR* |