diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2020-08-28 15:14:40 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-08-28 15:14:40 +0100 |
| commit | ea1bb830cb021cca2e361091cf728aaabc8c0654 (patch) | |
| tree | 3694098593f669dbd6b351688c4dce6e87335843 /hw/arm/armsse.c | |
| parent | 3e39dac0354c39b4b647940e42360c6b1f3edc02 (diff) | |
| parent | ed78849d9711805bda37ee026018d6ee7a606d0e (diff) | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200828' into staging
target-arm queue:
* target/arm: Cleanup and refactoring preparatory to SVE2
* armsse: Define ARMSSEClass correctly
* hw/misc/unimp: Improve information provided in log messages
* hw/qdev-clock: Avoid calling qdev_connect_clock_in after DeviceRealize
* hw/arm/xilinx_zynq: Call qdev_connect_clock_in() before DeviceRealize
* hw/net/allwinner-sun8i-emac: Use AddressSpace for DMA transfers
* hw/sd/allwinner-sdhost: Use AddressSpace for DMA transfers
* target/arm: Fill in the WnR syndrome bit in mte_check_fail
* target/arm: Clarify HCR_EL2 ARMCPRegInfo type
* hw/arm/musicpal: Use AddressSpace for DMA transfers
* hw/clock: Minor cleanups
* hw/arm/sbsa-ref: fix typo breaking PCIe IRQs
# gpg: Signature made Fri 28 Aug 2020 10:23:02 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20200828: (35 commits)
target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimd
target/arm: Convert integer multiply-add (indexed) to gvec for aa64 advsimd
target/arm: Convert integer multiply (indexed) to gvec for aa64 advsimd
target/arm: Generalize inl_qrdmlah_* helper functions
target/arm: Tidy SVE tszimm shift formats
target/arm: Split out gen_gvec_ool_zz
target/arm: Split out gen_gvec_ool_zzz
target/arm: Split out gen_gvec_ool_zzp
target/arm: Merge helper_sve_clr_* and helper_sve_movz_*
target/arm: Split out gen_gvec_ool_zzzp
target/arm: Use tcg_gen_gvec_bitsel for trans_SEL_pppp
target/arm: Clean up 4-operand predicate expansion
target/arm: Merge do_vector2_p into do_mov_p
target/arm: Rearrange {sve,fp}_check_access assert
target/arm: Split out gen_gvec_fn_zzz, do_zzz_fn
target/arm: Split out gen_gvec_fn_zz
qemu/int128: Add int128_lshift
armsse: Define ARMSSEClass correctly
hw/misc/unimp: Display the offset with width of the region size
hw/misc/unimp: Display the value with width of the access size
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/armsse.c')
| -rw-r--r-- | hw/arm/armsse.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 6264eab16b..a93da37dcb 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -1160,6 +1160,7 @@ static const TypeInfo armsse_info = { .name = TYPE_ARM_SSE, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(ARMSSE), + .class_size = sizeof(ARMSSEClass), .instance_init = armsse_init, .abstract = true, .interfaces = (InterfaceInfo[]) { |