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authoraliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-17 23:28:44 +0000
committeraliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-17 23:28:44 +0000
commit16b29ae1807b024bd5052301550f5d47dae958a2 (patch)
treeeeeb5072d4548b91f2111f3127737a374d89cab2 /hw/apic.c
parent0bacd1300dbcd7f56bdbf1ca73438b6a68c31b8f (diff)
Add HPET emulation to qemu (Beth Kon)
This patch adds HPET emulation. It can be disabled with -disable-hpet. An hpet provides a more finely granular clocksource than otherwise available on PC. This means that latency-dependent applications (e.g. multimedia) will generally be smoother when using the HPET. Signed-off-by: Beth Kon <eak@us.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6081 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/apic.c')
-rw-r--r--hw/apic.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/apic.c b/hw/apic.c
index a2915f8121..f6950ca4d4 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -945,6 +945,13 @@ void ioapic_set_irq(void *opaque, int vector, int level)
{
IOAPICState *s = opaque;
+ /* ISA IRQs map to GSI 1-1 except for IRQ0 which maps
+ * to GSI 2. GSI maps to ioapic 1-1. This is not
+ * the cleanest way of doing it but it should work. */
+
+ if (vector == 0)
+ vector = 2;
+
if (vector >= 0 && vector < IOAPIC_NUM_PINS) {
uint32_t mask = 1 << vector;
uint64_t entry = s->ioredtbl[vector];