diff options
| author | Andreas Färber <afaerber@suse.de> | 2013-01-17 22:30:20 +0100 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-03-12 10:35:55 +0100 |
| commit | d8ed887bdcd29ce2e967f8b15a6a2b6dcaa11cd5 (patch) | |
| tree | 57f8deccddd53e7aab5ca75d1d194da635a35790 /hw/alpha_typhoon.c | |
| parent | 259186a7d2f7184efc96ae99bc5658e6159f53ad (diff) | |
exec: Pass CPUState to cpu_reset_interrupt()
Move it to qom/cpu.c to avoid build failures depending on include order
of cpu-qom.h and exec/cpu-all.h.
Change opaques of various ..._irq_handler() functions to the
appropriate CPU type to facilitate using cpu_reset_interrupt().
Fix Coding Style issues while at it (missing braces, indentation).
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/alpha_typhoon.c')
| -rw-r--r-- | hw/alpha_typhoon.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/hw/alpha_typhoon.c b/hw/alpha_typhoon.c index 95571ffc5d..7bfde5771c 100644 --- a/hw/alpha_typhoon.c +++ b/hw/alpha_typhoon.c @@ -63,10 +63,11 @@ static void cpu_irq_change(AlphaCPU *cpu, uint64_t req) /* If there are any non-masked interrupts, tell the cpu. */ if (cpu != NULL) { CPUAlphaState *env = &cpu->env; + CPUState *cs = CPU(cpu); if (req) { cpu_interrupt(env, CPU_INTERRUPT_HARD); } else { - cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); + cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); } } } @@ -359,16 +360,17 @@ static void cchip_write(void *opaque, hwaddr addr, AlphaCPU *cpu = s->cchip.cpu[i]; if (cpu != NULL) { CPUAlphaState *env = &cpu->env; + CPUState *cs = CPU(cpu); /* IPI can be either cleared or set by the write. */ if (newval & (1 << (i + 8))) { cpu_interrupt(env, CPU_INTERRUPT_SMP); } else { - cpu_reset_interrupt(env, CPU_INTERRUPT_SMP); + cpu_reset_interrupt(cs, CPU_INTERRUPT_SMP); } /* ITI can only be cleared by the write. */ if ((newval & (1 << (i + 4))) == 0) { - cpu_reset_interrupt(env, CPU_INTERRUPT_TIMER); + cpu_reset_interrupt(cs, CPU_INTERRUPT_TIMER); } } } |