diff options
author | Gerd Hoffmann <kraxel@redhat.com> | 2012-11-23 15:35:13 +0100 |
---|---|---|
committer | Gerd Hoffmann <kraxel@redhat.com> | 2012-12-04 13:52:43 +0100 |
commit | b65b93f24cb84923d2d7d43cf87d40bc88b6bdcd (patch) | |
tree | 09f3a3d9ed08db15b1e8144af9b875b53f830b21 /hw/acpi_piix4.c | |
parent | 24fe083de67e0f736c54da4abda05f23ec37c51d (diff) |
apci: switch piix4 gpe to memory api
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Diffstat (limited to 'hw/acpi_piix4.c')
-rw-r--r-- | hw/acpi_piix4.c | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index b1d5bf3d61..c1a58d32c7 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -57,6 +57,7 @@ struct pci_status { typedef struct PIIX4PMState { PCIDevice dev; MemoryRegion io; + MemoryRegion io_gpe; ACPIREGS ar; APMState apm; @@ -500,7 +501,7 @@ static void piix4_pm_register_types(void) type_init(piix4_pm_register_types) -static uint32_t gpe_readb(void *opaque, uint32_t addr) +static uint64_t gpe_readb(void *opaque, hwaddr addr, unsigned width) { PIIX4PMState *s = opaque; uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr); @@ -509,7 +510,8 @@ static uint32_t gpe_readb(void *opaque, uint32_t addr) return val; } -static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val) +static void gpe_writeb(void *opaque, hwaddr addr, uint64_t val, + unsigned width) { PIIX4PMState *s = opaque; @@ -519,6 +521,16 @@ static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val) PIIX4_DPRINTF("gpe write %x <== %d\n", addr, val); } +static const MemoryRegionOps piix4_gpe_ops = { + .read = gpe_readb, + .write = gpe_writeb, + .valid.min_access_size = 1, + .valid.max_access_size = 4, + .impl.min_access_size = 1, + .impl.max_access_size = 1, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + static uint32_t pci_up_read(void *opaque, uint32_t addr) { PIIX4PMState *s = opaque; @@ -567,10 +579,10 @@ static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) { - - register_ioport_write(GPE_BASE, GPE_LEN, 1, gpe_writeb, s); - register_ioport_read(GPE_BASE, GPE_LEN, 1, gpe_readb, s); - acpi_gpe_blk(&s->ar, GPE_BASE); + memory_region_init_io(&s->io_gpe, &piix4_gpe_ops, s, "apci-gpe0", + GPE_LEN); + memory_region_add_subregion(get_system_io(), GPE_BASE, &s->io_gpe); + acpi_gpe_blk(&s->ar, 0); register_ioport_read(PCI_UP_BASE, 4, 4, pci_up_read, s); register_ioport_read(PCI_DOWN_BASE, 4, 4, pci_down_read, s); |