diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2021-11-01 16:08:14 +0000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-11-02 14:14:55 -0400 |
| commit | dbd9e08476f09cf3556b9b8a306bf277172841a9 (patch) | |
| tree | bbf2e9e9627b6b33a9d4d6a731e8027559891b75 /gdb-xml | |
| parent | da2f02b360f405d7badc4a3028276e07db58026c (diff) | |
target/arm: Advertise MVE to gdb when present
Cortex-M CPUs with MVE should advertise this fact to gdb, using the
org.gnu.gdb.arm.m-profile-mve XML feature, which defines the VPR
register. Presence of this feature also tells gdb to create
pseudo-registers Q0..Q7, so we do not need to tell gdb about them
separately.
Note that unless you have a very recent GDB that includes this fix:
http://patches-tcwg.linaro.org/patch/58133/ gdb will mis-print the
individual fields of the VPR register as zero (but showing the whole
thing as hex, eg with "print /x $vpr" will give the correct value).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20211101160814.5103-1-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'gdb-xml')
| -rw-r--r-- | gdb-xml/arm-m-profile-mve.xml | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/gdb-xml/arm-m-profile-mve.xml b/gdb-xml/arm-m-profile-mve.xml new file mode 100644 index 0000000000..cba664c4c5 --- /dev/null +++ b/gdb-xml/arm-m-profile-mve.xml @@ -0,0 +1,19 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2021 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.arm.m-profile-mve"> + <flags id="vpr_reg" size="4"> + <!-- ARMv8.1-M and MVE: Unprivileged and privileged Access. --> + <field name="P0" start="0" end="15"/> + <!-- ARMv8.1-M: Privileged Access only. --> + <field name="MASK01" start="16" end="19"/> + <!-- ARMv8.1-M: Privileged Access only. --> + <field name="MASK23" start="20" end="23"/> + </flags> + <reg name="vpr" bitsize="32" type="vpr_reg"/> +</feature> |