diff options
| author | Xiaojuan Yang <yangxiaojuan@loongson.cn> | 2022-06-06 20:43:31 +0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2022-06-06 18:14:13 +0000 |
| commit | ca61e75071c647cf93b3161a228c6a54178cd58c (patch) | |
| tree | 6e14abe71598b0aac77ea465e8bf1cd5cee9a37e /gdb-xml/loongarch-fpu64.xml | |
| parent | 9e6602d65704dc8d2a3fbcd76bfad1bb22fc3d72 (diff) | |
target/loongarch: Add gdb support.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-42-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'gdb-xml/loongarch-fpu64.xml')
| -rw-r--r-- | gdb-xml/loongarch-fpu64.xml | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/gdb-xml/loongarch-fpu64.xml b/gdb-xml/loongarch-fpu64.xml new file mode 100644 index 0000000000..e52cf89fbc --- /dev/null +++ b/gdb-xml/loongarch-fpu64.xml @@ -0,0 +1,57 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2021 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.loongarch.fpu"> + + <union id="fpu64type"> + <field name="f" type="ieee_single"/> + <field name="d" type="ieee_double"/> + </union> + + <reg name="f0" bitsize="64" type="fpu64type" group="float"/> + <reg name="f1" bitsize="64" type="fpu64type" group="float"/> + <reg name="f2" bitsize="64" type="fpu64type" group="float"/> + <reg name="f3" bitsize="64" type="fpu64type" group="float"/> + <reg name="f4" bitsize="64" type="fpu64type" group="float"/> + <reg name="f5" bitsize="64" type="fpu64type" group="float"/> + <reg name="f6" bitsize="64" type="fpu64type" group="float"/> + <reg name="f7" bitsize="64" type="fpu64type" group="float"/> + <reg name="f8" bitsize="64" type="fpu64type" group="float"/> + <reg name="f9" bitsize="64" type="fpu64type" group="float"/> + <reg name="f10" bitsize="64" type="fpu64type" group="float"/> + <reg name="f11" bitsize="64" type="fpu64type" group="float"/> + <reg name="f12" bitsize="64" type="fpu64type" group="float"/> + <reg name="f13" bitsize="64" type="fpu64type" group="float"/> + <reg name="f14" bitsize="64" type="fpu64type" group="float"/> + <reg name="f15" bitsize="64" type="fpu64type" group="float"/> + <reg name="f16" bitsize="64" type="fpu64type" group="float"/> + <reg name="f17" bitsize="64" type="fpu64type" group="float"/> + <reg name="f18" bitsize="64" type="fpu64type" group="float"/> + <reg name="f19" bitsize="64" type="fpu64type" group="float"/> + <reg name="f20" bitsize="64" type="fpu64type" group="float"/> + <reg name="f21" bitsize="64" type="fpu64type" group="float"/> + <reg name="f22" bitsize="64" type="fpu64type" group="float"/> + <reg name="f23" bitsize="64" type="fpu64type" group="float"/> + <reg name="f24" bitsize="64" type="fpu64type" group="float"/> + <reg name="f25" bitsize="64" type="fpu64type" group="float"/> + <reg name="f26" bitsize="64" type="fpu64type" group="float"/> + <reg name="f27" bitsize="64" type="fpu64type" group="float"/> + <reg name="f28" bitsize="64" type="fpu64type" group="float"/> + <reg name="f29" bitsize="64" type="fpu64type" group="float"/> + <reg name="f30" bitsize="64" type="fpu64type" group="float"/> + <reg name="f31" bitsize="64" type="fpu64type" group="float"/> + <reg name="fcc0" bitsize="8" type="uint8" group="float"/> + <reg name="fcc1" bitsize="8" type="uint8" group="float"/> + <reg name="fcc2" bitsize="8" type="uint8" group="float"/> + <reg name="fcc3" bitsize="8" type="uint8" group="float"/> + <reg name="fcc4" bitsize="8" type="uint8" group="float"/> + <reg name="fcc5" bitsize="8" type="uint8" group="float"/> + <reg name="fcc6" bitsize="8" type="uint8" group="float"/> + <reg name="fcc7" bitsize="8" type="uint8" group="float"/> + <reg name="fcsr" bitsize="32" type="uint32" group="float"/> +</feature> |