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authorPeter Maydell <peter.maydell@linaro.org>2021-02-19 14:45:55 +0000
committerPeter Maydell <peter.maydell@linaro.org>2021-03-08 17:20:02 +0000
commit3378873802afe8af0355c4fac3e11e6510fc1f27 (patch)
tree563fa01a7eb193e21f97c54937c2325f004b1ae5 /fsdev
parent91eb4f64eb49ea8dc7e5ebf5fdb377008ee0b688 (diff)
hw/arm/armsse: Add a define for number of IRQs used by the SSE itself
The SSE uses 32 interrupts for its own devices, and then passes through its expansion IRQ inputs to the CPU's interrupts 33 and upward. Add a define for the number of IRQs the SSE uses for itself, instead of hardcoding 32. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210219144617.4782-23-peter.maydell@linaro.org
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