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author | Richard Henderson <richard.henderson@linaro.org> | 2021-05-25 15:58:09 -0700 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2021-06-03 16:43:26 +0100 |
commit | d29b17ca3eac79ab77c76ec8285698b0c57d04b2 (patch) | |
tree | 1fbaa23f0de19948cfb94100d3e31524051f2f34 /fpu | |
parent | 3a98ac40fa9fca85bb37f4281e872b7519e733c5 (diff) |
target/arm: Implement vector float32 to bfloat16 conversion
This is BFCVT{N,T} for both AArch64 AdvSIMD and SVE,
and VCVT.BF16.F32 for AArch32 NEON.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210525225817.400336-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'fpu')
0 files changed, 0 insertions, 0 deletions