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authorPeter Maydell <peter.maydell@linaro.org>2021-06-03 16:59:46 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-06-03 16:59:46 +0100
commit453d9c61dd5681159051c6e4d07e7b2633de2e70 (patch)
tree05ffaa4e20018c74d89d3a91eb3edbc66111e0c0 /fpu
parenta97978bcc2d1f650c7d411428806e5b03082b8c7 (diff)
parent1c861885894d840235954060050d240259f5340b (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210603' into staging
target-arm queue: * Some not-yet-enabled preliminaries for M-profile MVE support * Consistently use "Cortex-Axx", not "Cortex Axx" in docs, comments * docs: Fix installation of man pages with Sphinx 4.x * Mark LDS{MIN,MAX} as signed operations * Fix missing syndrome value for DAIF and PAC check exceptions * Implement BFloat16 extensions * Refactoring of hvf accelerator code in preparation for aarch64 support * Fix some coverity nits in test code # gpg: Signature made Thu 03 Jun 2021 16:58:02 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210603: (45 commits) tests/unit/test-vmstate: Assert that dup() and mkstemp() succeed tests/qtest/tpm-tests: Remove unnecessary NULL checks tests/qtest/pflash-cfi02-test: Avoid potential integer overflow tests/qtest/hd-geo-test: Fix checks on mkstemp() return value tests/qtest/e1000e-test: Check qemu_recv() succeeded tests/qtest/bios-tables-test: Check for dup2() failure hvf: Simplify post reset/init/loadvm hooks hvf: Introduce hvf vcpu struct hvf: Remove hvf-accel-ops.h hvf: Make synchronize functions static hvf: Use cpu_synchronize_state() hvf: Split out common code on vcpu init and destroy hvf: Remove use of hv_uvaddr_t and hv_gpaddr_t hvf: Make hvf_set_phys_mem() static hvf: Move hvf internal definitions into common header hvf: Move cpu functions into common directory hvf: Move vcpu thread functions into common directory hvf: Move assert_hvf_ok() into common directory target/arm: Enable BFloat16 extensions linux-user/aarch64: Enable hwcap bits for bfloat16 ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'fpu')
-rw-r--r--fpu/softfloat-parts.c.inc6
1 files changed, 4 insertions, 2 deletions
diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc
index a897a5a743..7f69da1d8f 100644
--- a/fpu/softfloat-parts.c.inc
+++ b/fpu/softfloat-parts.c.inc
@@ -176,13 +176,12 @@ static void partsN(uncanon)(FloatPartsN *p, float_status *s,
g_assert_not_reached();
}
+ overflow_norm = false;
switch (s->float_rounding_mode) {
case float_round_nearest_even:
- overflow_norm = false;
inc = ((p->frac_lo & roundeven_mask) != frac_lsbm1 ? frac_lsbm1 : 0);
break;
case float_round_ties_away:
- overflow_norm = false;
inc = frac_lsbm1;
break;
case float_round_to_zero:
@@ -199,6 +198,8 @@ static void partsN(uncanon)(FloatPartsN *p, float_status *s,
break;
case float_round_to_odd:
overflow_norm = true;
+ /* fall through */
+ case float_round_to_odd_inf:
inc = p->frac_lo & frac_lsb ? 0 : round_mask;
break;
default:
@@ -259,6 +260,7 @@ static void partsN(uncanon)(FloatPartsN *p, float_status *s,
? frac_lsbm1 : 0);
break;
case float_round_to_odd:
+ case float_round_to_odd_inf:
inc = p->frac_lo & frac_lsb ? 0 : round_mask;
break;
default: