diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2015-01-12 14:38:27 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2015-01-29 16:45:33 +0000 |
commit | 332d5849708d11b835e0b36f4e26e8b36bfb3f5a (patch) | |
tree | 022e3157f592ba233f8b7204a1e2c3638ac5c9d9 /fpu | |
parent | 6bb8e0f130bd4aecfe835a0caa94390fa2235fde (diff) |
softfloat: Revert and reimplement remaining parts of b645bb4885 and 5a6932d51d
Revert the parts of commits b645bb4885 and 5a6932d51d which are still
in the codebase and under a SoftFloat-2b license.
Reimplement support for architectures where the most significant bit
in the mantissa is 1 for a signaling NaN rather than a quiet NaN,
by adding handling for SNAN_BIT_IS_ONE being set to the functions
which test values for NaN-ness.
This includes restoring the bugfixes lost in the reversion where
some of the float*_is_quiet_nan() functions were returning true
for both signaling and quiet NaNs.
[This is a mechanical squashing together of two separate "revert"
and "reimplement" patches.]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 1421073508-23909-4-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'fpu')
-rw-r--r-- | fpu/softfloat-specialize.h | 57 |
1 files changed, 29 insertions, 28 deletions
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 39335b4d51..95e3647a43 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -33,10 +33,14 @@ this code that are retained. =============================================================================== */ +/* Does the target distinguish signaling NaNs from non-signaling NaNs + * by setting the most significant bit of the mantissa for a signaling NaN? + * (The more common choice is to have it be zero for SNaN and one for QNaN.) + */ #if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) -#define SNAN_BIT_IS_ONE 1 +#define SNAN_BIT_IS_ONE 1 #else -#define SNAN_BIT_IS_ONE 0 +#define SNAN_BIT_IS_ONE 0 #endif #if defined(TARGET_XTENSA) @@ -79,7 +83,7 @@ const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF )); #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 )); #elif SNAN_BIT_IS_ONE -const float64 float64_default_nan = const_float64(LIT64( 0x7FF7FFFFFFFFFFFF )); +const float64 float64_default_nan = const_float64(LIT64(0x7FF7FFFFFFFFFFFF)); #else const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 )); #endif @@ -89,7 +93,7 @@ const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 )); *----------------------------------------------------------------------------*/ #if SNAN_BIT_IS_ONE #define floatx80_default_nan_high 0x7FFF -#define floatx80_default_nan_low LIT64( 0xBFFFFFFFFFFFFFFF ) +#define floatx80_default_nan_low LIT64(0xBFFFFFFFFFFFFFFF) #else #define floatx80_default_nan_high 0xFFFF #define floatx80_default_nan_low LIT64( 0xC000000000000000 ) @@ -103,8 +107,8 @@ const floatx80 floatx80_default_nan | `low' values hold the most- and least-significant bits, respectively. *----------------------------------------------------------------------------*/ #if SNAN_BIT_IS_ONE -#define float128_default_nan_high LIT64( 0x7FFF7FFFFFFFFFFF ) -#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF ) +#define float128_default_nan_high LIT64(0x7FFF7FFFFFFFFFFF) +#define float128_default_nan_low LIT64(0xFFFFFFFFFFFFFFFF) #else #define float128_default_nan_high LIT64( 0xFFFF800000000000 ) #define float128_default_nan_low LIT64( 0x0000000000000000 ) @@ -255,9 +259,9 @@ int float32_is_quiet_nan( float32 a_ ) { uint32_t a = float32_val(a_); #if SNAN_BIT_IS_ONE - return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); + return (((a >> 22) & 0x1ff) == 0x1fe) && (a & 0x003fffff); #else - return ( 0xFF800000 <= (uint32_t) ( a<<1 ) ); + return ((uint32_t)(a << 1) >= 0xff800000); #endif } @@ -270,7 +274,7 @@ int float32_is_signaling_nan( float32 a_ ) { uint32_t a = float32_val(a_); #if SNAN_BIT_IS_ONE - return ( 0xFF800000 <= (uint32_t) ( a<<1 ) ); + return ((uint32_t)(a << 1) >= 0xff800000); #else return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); #endif @@ -663,11 +667,10 @@ int float64_is_quiet_nan( float64 a_ ) { uint64_t a = float64_val(a_); #if SNAN_BIT_IS_ONE - return - ( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) - && ( a & LIT64( 0x0007FFFFFFFFFFFF ) ); + return (((a >> 51) & 0xfff) == 0xffe) + && (a & 0x0007ffffffffffffULL); #else - return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) ); + return ((a << 1) >= 0xfff0000000000000ULL); #endif } @@ -680,7 +683,7 @@ int float64_is_signaling_nan( float64 a_ ) { uint64_t a = float64_val(a_); #if SNAN_BIT_IS_ONE - return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) ); + return ((a << 1) >= 0xfff0000000000000ULL); #else return ( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) @@ -864,11 +867,10 @@ int floatx80_is_quiet_nan( floatx80 a ) #if SNAN_BIT_IS_ONE uint64_t aLow; - aLow = a.low & ~ LIT64( 0x4000000000000000 ); - return - ( ( a.high & 0x7FFF ) == 0x7FFF ) - && (uint64_t) ( aLow<<1 ) - && ( a.low == aLow ); + aLow = a.low & ~0x4000000000000000ULL; + return ((a.high & 0x7fff) == 0x7fff) + && (aLow << 1) + && (a.low == aLow); #else return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 ))); @@ -884,8 +886,8 @@ int floatx80_is_quiet_nan( floatx80 a ) int floatx80_is_signaling_nan( floatx80 a ) { #if SNAN_BIT_IS_ONE - return ( ( a.high & 0x7FFF ) == 0x7FFF ) - && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 ))); + return ((a.high & 0x7fff) == 0x7fff) + && ((a.low << 1) >= 0x8000000000000000ULL); #else uint64_t aLow; @@ -1029,13 +1031,12 @@ int float128_is_signaling_nan(float128 a_) int float128_is_quiet_nan( float128 a ) { #if SNAN_BIT_IS_ONE - return - ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE ) - && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) ); + return (((a.high >> 47) & 0xffff) == 0xfffe) + && (a.low || (a.high & 0x00007fffffffffffULL)); #else return - ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) ) - && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); + ((a.high << 1) >= 0xffff000000000000ULL) + && (a.low || (a.high & 0x0000ffffffffffffULL)); #endif } @@ -1048,8 +1049,8 @@ int float128_is_signaling_nan( float128 a ) { #if SNAN_BIT_IS_ONE return - ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) ) - && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); + ((a.high << 1) >= 0xffff000000000000ULL) + && (a.low || (a.high & 0x0000ffffffffffffULL)); #else return ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE ) |