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authorMax Filippov <jcmvbkbc@gmail.com>2012-01-09 06:42:11 +0400
committerMax Filippov <jcmvbkbc@gmail.com>2012-02-18 01:25:27 +0400
commitb96ac3e4cccf0ed92ffad4803d8558ebb6cdbad5 (patch)
tree0a1bd18bed73aeeffae8bf90ca6a971b1eaa629c /fpu/softfloat.h
parent99c7f87826337fa81f2f0f9baa9ca0a44faf90e9 (diff)
target-xtensa: define TLB_TEMPLATE for MMU-less cores
TLB_TEMPLATE macro specifies TLB geometry in the core configuration. Make TLB_TEMPLATE available for region protection core variants, defining 1 way ITLB and DTLB with 8 entries each. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'fpu/softfloat.h')
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