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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-19 13:37:53 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-19 13:37:53 +0000
commita49ea279c4fcda7e6558bfe5b32a8d9aff0dd05b (patch)
treeda6b005397596cda89d55c8ec49a6039088f5d4b /fpu/softfloat-specialize.h
parentfe1479c3ad177df09d465338d5421a5f3b857f91 (diff)
Implement ARMv7 cp15 cache ID registers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6105 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'fpu/softfloat-specialize.h')
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