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author | Richard Henderson <richard.henderson@linaro.org> | 2020-10-23 16:37:01 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2021-05-16 07:13:51 -0500 |
commit | e9034ea87e33d2e981a79d6f34567bd8e31c91a3 (patch) | |
tree | 1ec7f04a54472920a4188e744076cc4f607181d7 /fpu/softfloat-specialize.c.inc | |
parent | 0018b1f41bf37f8c3dff7663395a231c8a77771d (diff) |
softfloat: Convert float128_default_nan to parts
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'fpu/softfloat-specialize.c.inc')
-rw-r--r-- | fpu/softfloat-specialize.c.inc | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index 5b85b843c2..c895733e79 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -171,6 +171,25 @@ static void parts64_default_nan(FloatParts64 *p, float_status *status) }; } +static void parts128_default_nan(FloatParts128 *p, float_status *status) +{ + /* + * Extrapolate from the choices made by parts64_default_nan to fill + * in the quad-floating format. If the low bit is set, assume we + * want to set all non-snan bits. + */ + FloatParts64 p64; + parts64_default_nan(&p64, status); + + *p = (FloatParts128) { + .cls = float_class_qnan, + .sign = p64.sign, + .exp = INT_MAX, + .frac_hi = p64.frac, + .frac_lo = -(p64.frac & 1) + }; +} + /*---------------------------------------------------------------------------- | Returns a quiet NaN from a signalling NaN for the deconstructed | floating-point parts. |