diff options
author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-20 22:10:42 +0000 |
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committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-20 22:10:42 +0000 |
commit | 75d62a585629cdc1ae0d530189653cb1d8d9c53c (patch) | |
tree | c9a690e3cf2c6d9490c809017c5484e52ab94434 /fpu/softfloat-native.c | |
parent | b1e341ebb7fc177434e2fda728174fc0e962578e (diff) |
Add missing softfloat helpers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2518 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'fpu/softfloat-native.c')
-rw-r--r-- | fpu/softfloat-native.c | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/fpu/softfloat-native.c b/fpu/softfloat-native.c index 7b28a4cfea..c629926f88 100644 --- a/fpu/softfloat-native.c +++ b/fpu/softfloat-native.c @@ -59,11 +59,21 @@ float32 int32_to_float32(int v STATUS_PARAM) return (float32)v; } +float32 uint32_to_float32(unsigned int v STATUS_PARAM) +{ + return (float32)v; +} + float64 int32_to_float64(int v STATUS_PARAM) { return (float64)v; } +float64 uint32_to_float64(unsigned int v STATUS_PARAM) +{ + return (float64)v; +} + #ifdef FLOATX80 floatx80 int32_to_floatx80(int v STATUS_PARAM) { @@ -74,10 +84,18 @@ float32 int64_to_float32( int64_t v STATUS_PARAM) { return (float32)v; } +float32 uint64_to_float32( uint64_t v STATUS_PARAM) +{ + return (float32)v; +} float64 int64_to_float64( int64_t v STATUS_PARAM) { return (float64)v; } +float64 uint64_to_float64( uint64_t v STATUS_PARAM) +{ + return (float64)v; +} #ifdef FLOATX80 floatx80 int64_to_floatx80( int64_t v STATUS_PARAM) { @@ -132,6 +150,37 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM) } #endif +unsigned int float32_to_uint32( float32 a STATUS_PARAM) +{ + int64_t v; + unsigned int res; + + v = llrintf(a); + if (v < 0) { + res = 0; + } else if (v > 0xffffffff) { + res = 0xffffffff; + } else { + res = v; + } + return res; +} +unsigned int float32_to_uint32_round_to_zero( float32 a STATUS_PARAM) +{ + int64_t v; + unsigned int res; + + v = (int64_t)a; + if (v < 0) { + res = 0; + } else if (v > 0xffffffff) { + res = 0xffffffff; + } else { + res = v; + } + return res; +} + /*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision operations. *----------------------------------------------------------------------------*/ @@ -218,6 +267,53 @@ float128 float64_to_float128( float64 a STATUS_PARAM) } #endif +unsigned int float64_to_uint32( float64 a STATUS_PARAM) +{ + int64_t v; + unsigned int res; + + v = llrint(a); + if (v < 0) { + res = 0; + } else if (v > 0xffffffff) { + res = 0xffffffff; + } else { + res = v; + } + return res; +} +unsigned int float64_to_uint32_round_to_zero( float64 a STATUS_PARAM) +{ + int64_t v; + unsigned int res; + + v = (int64_t)a; + if (v < 0) { + res = 0; + } else if (v > 0xffffffff) { + res = 0xffffffff; + } else { + res = v; + } + return res; +} +uint64_t float64_to_uint64 (float64 a STATUS_PARAM) +{ + int64_t v; + + v = llrint(a + (float64)INT64_MIN); + + return v - INT64_MIN; +} +uint64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM) +{ + int64_t v; + + v = (int64_t)(a + (float64)INT64_MIN); + + return v - INT64_MIN; +} + /*---------------------------------------------------------------------------- | Software IEC/IEEE double-precision operations. *----------------------------------------------------------------------------*/ |