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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2006-10-22 00:18:54 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2006-10-22 00:18:54 +0000
commite6e5906b6e0a81718066ca43aef57515026c6624 (patch)
tree79996f66ed5a2e4f37783a114cb45f6913204486 /fpu/softfloat-native.c
parent223b8a40d13550ebc08216bd96d1f615597e0554 (diff)
ColdFire target.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2196 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'fpu/softfloat-native.c')
-rw-r--r--fpu/softfloat-native.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/fpu/softfloat-native.c b/fpu/softfloat-native.c
index bbdb3d66d9..1ef7cf29af 100644
--- a/fpu/softfloat-native.c
+++ b/fpu/softfloat-native.c
@@ -221,6 +221,11 @@ float128 float64_to_float128( float64 a STATUS_PARAM)
/*----------------------------------------------------------------------------
| Software IEC/IEEE double-precision operations.
*----------------------------------------------------------------------------*/
+float64 float64_trunc_to_int( float64 a STATUS_PARAM )
+{
+ return trunc(a);
+}
+
float64 float64_round_to_int( float64 a STATUS_PARAM )
{
#if defined(__arm__)
@@ -289,6 +294,17 @@ char float64_is_signaling_nan( float64 a1)
}
+char float64_is_nan( float64 a1 )
+{
+ float64u u;
+ uint64_t a;
+ u.f = a1;
+ a = u.i;
+
+ return ( LIT64( 0xFFE0000000000000 ) < (bits64) ( a<<1 ) );
+
+}
+
#ifdef FLOATX80
/*----------------------------------------------------------------------------