diff options
author | Paolo Bonzini <pbonzini@redhat.com> | 2020-02-25 13:41:48 +0100 |
---|---|---|
committer | Paolo Bonzini <pbonzini@redhat.com> | 2020-02-25 13:41:48 +0100 |
commit | 9e264985ff0bc86927b44b334bd504687f78659d (patch) | |
tree | 0e0cf83ea14b7cd84f255eedb15ffbf4c395d1ed /exec.c | |
parent | ca6155c0f2bd39b4b4162533be401c98bd960820 (diff) | |
parent | adeefe01671fb06a930beba624dc3db8367901a3 (diff) |
Merge branch 'exec_rw_const_v4' of https://github.com/philmd/qemu into HEAD
Diffstat (limited to 'exec.c')
-rw-r--r-- | exec.c | 67 |
1 files changed, 36 insertions, 31 deletions
@@ -2736,9 +2736,9 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, } static MemTxResult flatview_read(FlatView *fv, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, hwaddr len); + MemTxAttrs attrs, void *buf, hwaddr len); static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len); + const void *buf, hwaddr len); static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len, bool is_write, MemTxAttrs attrs); @@ -2975,11 +2975,12 @@ MemoryRegion *get_system_io(void) /* physical memory access (slow version, mainly for debug) */ #if defined(CONFIG_USER_ONLY) int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, - uint8_t *buf, target_ulong len, int is_write) + void *ptr, target_ulong len, bool is_write) { int flags; target_ulong l, page; void * p; + uint8_t *buf = ptr; while (len > 0) { page = addr & TARGET_PAGE_MASK; @@ -3103,14 +3104,15 @@ static bool prepare_mmio_access(MemoryRegion *mr) /* Called within RCU critical section. */ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, + const void *ptr, hwaddr len, hwaddr addr1, hwaddr l, MemoryRegion *mr) { - uint8_t *ptr; + uint8_t *ram_ptr; uint64_t val; MemTxResult result = MEMTX_OK; bool release_lock = false; + const uint8_t *buf = ptr; for (;;) { if (!memory_access_is_direct(mr, true)) { @@ -3123,8 +3125,8 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, size_memop(l), attrs); } else { /* RAM case */ - ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); - memcpy(ptr, buf, l); + ram_ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); + memcpy(ram_ptr, buf, l); invalidate_and_set_dirty(mr, addr1, l); } @@ -3150,7 +3152,7 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, /* Called from RCU critical section. */ static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len) + const void *buf, hwaddr len) { hwaddr l; hwaddr addr1; @@ -3167,14 +3169,15 @@ static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, /* Called within RCU critical section. */ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, + MemTxAttrs attrs, void *ptr, hwaddr len, hwaddr addr1, hwaddr l, MemoryRegion *mr) { - uint8_t *ptr; + uint8_t *ram_ptr; uint64_t val; MemTxResult result = MEMTX_OK; bool release_lock = false; + uint8_t *buf = ptr; for (;;) { if (!memory_access_is_direct(mr, false)) { @@ -3186,8 +3189,8 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, stn_he_p(buf, l, val); } else { /* RAM case */ - ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); - memcpy(buf, ptr, l); + ram_ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); + memcpy(buf, ram_ptr, l); } if (release_lock) { @@ -3212,7 +3215,7 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, /* Called from RCU critical section. */ static MemTxResult flatview_read(FlatView *fv, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, hwaddr len) + MemTxAttrs attrs, void *buf, hwaddr len) { hwaddr l; hwaddr addr1; @@ -3225,7 +3228,7 @@ static MemTxResult flatview_read(FlatView *fv, hwaddr addr, } MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, hwaddr len) + MemTxAttrs attrs, void *buf, hwaddr len) { MemTxResult result = MEMTX_OK; FlatView *fv; @@ -3241,7 +3244,7 @@ MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len) + const void *buf, hwaddr len) { MemTxResult result = MEMTX_OK; FlatView *fv; @@ -3256,7 +3259,7 @@ MemTxResult address_space_write(AddressSpace *as, hwaddr addr, } MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - uint8_t *buf, hwaddr len, bool is_write) + void *buf, hwaddr len, bool is_write) { if (is_write) { return address_space_write(as, addr, attrs, buf, len); @@ -3265,8 +3268,8 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, } } -void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, - hwaddr len, int is_write) +void cpu_physical_memory_rw(hwaddr addr, void *buf, + hwaddr len, bool is_write) { address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, buf, len, is_write); @@ -3280,14 +3283,15 @@ enum write_rom_type { static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, + const void *ptr, hwaddr len, enum write_rom_type type) { hwaddr l; - uint8_t *ptr; + uint8_t *ram_ptr; hwaddr addr1; MemoryRegion *mr; + const uint8_t *buf = ptr; RCU_READ_LOCK_GUARD(); while (len > 0) { @@ -3299,14 +3303,14 @@ static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, l = memory_access_size(mr, l, addr1); } else { /* ROM/RAM case */ - ptr = qemu_map_ram_ptr(mr->ram_block, addr1); + ram_ptr = qemu_map_ram_ptr(mr->ram_block, addr1); switch (type) { case WRITE_DATA: - memcpy(ptr, buf, l); + memcpy(ram_ptr, buf, l); invalidate_and_set_dirty(mr, addr1, l); break; case FLUSH_CACHE: - flush_icache_range((uintptr_t)ptr, (uintptr_t)ptr + l); + flush_icache_range((uintptr_t)ram_ptr, (uintptr_t)ram_ptr + l); break; } } @@ -3320,7 +3324,7 @@ static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, /* used for ROM loading : can write in RAM and ROM */ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len) + const void *buf, hwaddr len) { return address_space_write_rom_internal(as, addr, attrs, buf, len, WRITE_DATA); @@ -3550,11 +3554,11 @@ void *address_space_map(AddressSpace *as, } /* Unmaps a memory region previously mapped by address_space_map(). - * Will also mark the memory as dirty if is_write == 1. access_len gives + * Will also mark the memory as dirty if is_write is true. access_len gives * the amount of memory that was actually read or written by the caller. */ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, - int is_write, hwaddr access_len) + bool is_write, hwaddr access_len) { if (buffer != bounce.buffer) { MemoryRegion *mr; @@ -3584,14 +3588,14 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, void *cpu_physical_memory_map(hwaddr addr, hwaddr *plen, - int is_write) + bool is_write) { return address_space_map(&address_space_memory, addr, plen, is_write, MEMTXATTRS_UNSPECIFIED); } void cpu_physical_memory_unmap(void *buffer, hwaddr len, - int is_write, hwaddr access_len) + bool is_write, hwaddr access_len) { return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len); } @@ -3742,10 +3746,11 @@ address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr, /* virtual memory access for debug (includes writing to ROM) */ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, - uint8_t *buf, target_ulong len, int is_write) + void *ptr, target_ulong len, bool is_write) { hwaddr phys_addr; target_ulong l, page; + uint8_t *buf = ptr; cpu_synchronize_state(cpu); while (len > 0) { @@ -3766,8 +3771,8 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf, l); } else { - address_space_rw(cpu->cpu_ases[asidx].as, phys_addr, - attrs, buf, l, 0); + address_space_read(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf, + l); } len -= l; buf += l; |