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authorEmilio G. Cota <cota@braap.org>2018-06-22 13:45:31 -0400
committerPeter Maydell <peter.maydell@linaro.org>2018-06-22 18:55:24 +0100
commitf28d0dfdce5754d80d2a5993fff2f5312b32cac1 (patch)
treea617a0509e7b4eac361345a3f1d0a1a33fcc0dfb /exec.c
parent7ed14cbf3cf083f125c079bd02b3215941853830 (diff)
tcg: fix --disable-tcg build breakage
Fix the --disable-tcg breakage introduced by tb_lock's removal by relying on the fact that tcg_enabled() is set to 0 at compile-time under --disable-tcg. While at it, add further asserts to fix builds that enable both --disable-tcg and --enable-debug, which were broken even before tb_lock's removal. Tested to build x86_64-softmmu and i386-softmmu targets. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'exec.c')
-rw-r--r--exec.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/exec.c b/exec.c
index 28f9bdcbf9..88edb59060 100644
--- a/exec.c
+++ b/exec.c
@@ -1323,6 +1323,7 @@ static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length)
RAMBlock *block;
ram_addr_t end;
+ assert(tcg_enabled());
end = TARGET_PAGE_ALIGN(start + length);
start &= TARGET_PAGE_MASK;
@@ -2655,6 +2656,7 @@ void memory_notdirty_write_prepare(NotDirtyInfo *ndi,
void memory_notdirty_write_complete(NotDirtyInfo *ndi)
{
if (ndi->pages) {
+ assert(tcg_enabled());
page_collection_unlock(ndi->pages);
ndi->pages = NULL;
}
@@ -3046,6 +3048,7 @@ static void tcg_commit(MemoryListener *listener)
CPUAddressSpace *cpuas;
AddressSpaceDispatch *d;
+ assert(tcg_enabled());
/* since each CPU stores ram addresses in its TLB cache, we must
reset the modified entries */
cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);