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author | Peter Maydell <peter.maydell@linaro.org> | 2019-03-05 21:07:29 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2019-03-05 21:07:29 +0000 |
commit | b5b6b2b912bbcd3953407da938a8f969577ad3a1 (patch) | |
tree | 57900df799ddbb06c25c34bf0a90842646806f63 /docs | |
parent | a3e3b0a7bd5de211a62cdf2d6c12b96d3c403560 (diff) | |
parent | 0fdd986a6c8f921693d025c3f095a0eaf628b6b6 (diff) |
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-mar-05-2019' into staging
MIPS queue for March 5th, 2019
# gpg: Signature made Tue 05 Mar 2019 16:06:34 GMT
# gpg: using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65
* remotes/amarkovic/tags/mips-queue-mar-05-2019:
target/mips: Add tests for integer add MSA instruction group
tests/tcg: target/mips: Add tests for MSA pack instructions
tests/tcg: target/mips: Add tests for MIPS64R6 int multiply instructions
tests/tcg: target/mips: Add tests for MIPS64R6 shift instructions
tests/tcg: target/mips: Add tests for MIPS64R6 bit count instructions
tests/tcg: target/mips: Add tests for MIPS64R6 bit swap instructions
tests/tcg: target/mips: Add tests for MIPS64R6 logic instructions
tests/tcg: target/mips: Add wrappers for some MIPS64R6 instructions
tests/tcg: target/mips: Extend functionality of MSA wrapper macros
tests/tcg: target/mips: Fix test utilities for 128-bit tests
tests/tcg: target/mips: Add test utilities for 64-bit tests
tests/tcg: target/mips: Add test utilities for 32-bit tests
tests/tcg: target/mips: Add wrappers for various MSA instructions
disas: nanoMIPS: Add graphical description of pool organization
disas: nanoMIPS: Correct comments to handlers of some DSP instructions
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs')
0 files changed, 0 insertions, 0 deletions