diff options
| author | Bin Meng <bin.meng@windriver.com> | 2021-01-26 14:00:07 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-03-04 09:43:29 -0500 |
| commit | 01153d2b606ccef3414cbedd3309e7c965902b6b (patch) | |
| tree | 86a0e741ac488e0e744f63a4eed5fb5b7baf9baf /docs/system/target-riscv.rst | |
| parent | d6d98968142f9c2541ee28e239d6a95b117499da (diff) | |
docs/system: riscv: Add documentation for sifive_u machine
This adds detailed documentation for RISC-V `sifive_u` machine,
including the following information:
- Supported devices
- Hardware configuration information
- Boot options
- Machine-specific options
- Running Linux kernel
- Running VxWorks kernel
- Running U-Boot, and with an alternate configuration
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Message-id: 20210126060007.12904-10-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'docs/system/target-riscv.rst')
| -rw-r--r-- | docs/system/target-riscv.rst | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/docs/system/target-riscv.rst b/docs/system/target-riscv.rst index 9f4b7586e5..94d99c4c82 100644 --- a/docs/system/target-riscv.rst +++ b/docs/system/target-riscv.rst @@ -58,5 +58,15 @@ undocumented; you can get a complete list by running ``qemu-system-riscv64 --machine help``, or ``qemu-system-riscv32 --machine help``. +.. + This table of contents should be kept sorted alphabetically + by the title text of each file, which isn't the same ordering + as an alphabetical sort by filename. + +.. toctree:: + :maxdepth: 1 + + riscv/sifive_u + RISC-V CPU features ------------------- |