diff options
| author | Bin Meng <bin.meng@windriver.com> | 2021-03-22 15:52:48 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-03-22 21:54:40 -0400 |
| commit | d4e28f0eb8d6f4de42bf7685eb5d3b70407d5e50 (patch) | |
| tree | ccfb1d8180387694c8bf93c965281a7274d87bf2 /docs/system/target-riscv.rst | |
| parent | d6150ace2bccfee6b5f7bb555ca749739b02f687 (diff) | |
docs/system: riscv: Add documentation for 'microchip-icicle-kit' machine
This adds the documentation to describe what is supported for the
'microchip-icicle-kit' machine, and how to boot the machine in QEMU.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210322075248.136255-2-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'docs/system/target-riscv.rst')
| -rw-r--r-- | docs/system/target-riscv.rst | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/docs/system/target-riscv.rst b/docs/system/target-riscv.rst index 94d99c4c82..8d5946fbbb 100644 --- a/docs/system/target-riscv.rst +++ b/docs/system/target-riscv.rst @@ -66,6 +66,7 @@ undocumented; you can get a complete list by running .. toctree:: :maxdepth: 1 + riscv/microchip-icicle-kit riscv/sifive_u RISC-V CPU features |