diff options
| author | Vijai Kumar K <vijai@behindbytes.com> | 2021-04-12 23:12:48 +0530 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-05-11 20:02:06 +1000 |
| commit | 0924a423baa227fa8fb363232c20a997cb6f617b (patch) | |
| tree | 25dd9c3b1c68315221915d7ccfc37546031ad96d /docs/system/target-riscv.rst | |
| parent | 65606f21243a796537bfe4708720a9bf4bb50169 (diff) | |
docs: Add documentation for shakti_c machine
Add documentation for Shakti C reference platform.
Signed-off-by: Vijai Kumar K <vijai@behindbytes.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210412174248.8668-1-vijai@behindbytes.com
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
[ Changes from Bin Meng:
- Add missing TOC
Message-id: 20210430070534.1487242-1-bmeng.cn@gmail.com
]
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'docs/system/target-riscv.rst')
| -rw-r--r-- | docs/system/target-riscv.rst | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/docs/system/target-riscv.rst b/docs/system/target-riscv.rst index 8d5946fbbb..4b3c78382c 100644 --- a/docs/system/target-riscv.rst +++ b/docs/system/target-riscv.rst @@ -67,6 +67,7 @@ undocumented; you can get a complete list by running :maxdepth: 1 riscv/microchip-icicle-kit + riscv/shakti-c riscv/sifive_u RISC-V CPU features |