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authorKashyap Chamarthy <kchamart@redhat.com>2020-02-28 15:36:01 +0000
committerPeter Maydell <peter.maydell@linaro.org>2020-03-06 10:05:12 +0000
commit1bf84a1e2e8f3262c63469b11fb641fcc9747e6a (patch)
tree276cdb5962e7a9c9f4654db3a6f2f8abd166b90a /docs/system/cpu-models-mips.rst.inc
parentde1572ca4902c057b100d5c3434f254dfc677ddd (diff)
docs/system: Convert qemu-cpu-models.texi to rST
This doc was originally written by Daniel P. Berrangé <berrange@redhat.com>, introduced via commit[1]: 2544e9e4aa (docs: add guidance on configuring CPU models for x86, 2018-06-27). In this patch: - 1-1 conversion of Texinfo to rST, besides a couple of minor tweaks that are too trivial to mention. (Thanks to Stephen Finucane on IRC for the suggestion to use rST "definition lists" instead of bullets in some places.) Further modifications will be done via a separate patch. - rST and related infra changes: manual page generation, Makefile fixes, clean up references to qemu-cpu-models.texi, update year in the copyright notice, etc. [1] https://git.qemu.org/?p=qemu.git;a=commit;h=2544e9e4aa As part of the conversion, we use a more generic 'author' attribution for the manpage than we previously had, as agreed with the original author Dan Berrange. Signed-off-by: Kashyap Chamarthy <kchamart@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-16-peter.maydell@linaro.org Message-id: 20200226113034.6741-15-pbonzini@redhat.com [Move macros to defs.rst.inc, split in x86 and MIPS parts, make qemu-cpu-models.rst a standalone document. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> [PMM: Move defs.rst.inc setup to its own commit; fix minor issues with MAINTAINERS file updates; drop copyright date change; keep capitalization of "QEMU Project developers" consistent with other uses; minor Makefile fixups] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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+Supported CPU model configurations on MIPS hosts
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+QEMU supports variety of MIPS CPU models:
+
+Supported CPU models for MIPS32 hosts
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The following CPU models are supported for use on MIPS32 hosts.
+Administrators / applications are recommended to use the CPU model that
+matches the generation of the host CPUs in use. In a deployment with a
+mixture of host CPU models between machines, if live migration
+compatibility is required, use the newest CPU model that is compatible
+across all desired hosts.
+
+``mips32r6-generic``
+ MIPS32 Processor (Release 6, 2015)
+
+``P5600``
+ MIPS32 Processor (P5600, 2014)
+
+``M14K``, ``M14Kc``
+ MIPS32 Processor (M14K, 2009)
+
+``74Kf``
+ MIPS32 Processor (74K, 2007)
+
+``34Kf``
+ MIPS32 Processor (34K, 2006)
+
+``24Kc``, ``24KEc``, ``24Kf``
+ MIPS32 Processor (24K, 2003)
+
+``4Kc``, ``4Km``, ``4KEcR1``, ``4KEmR1``, ``4KEc``, ``4KEm``
+ MIPS32 Processor (4K, 1999)
+
+
+Supported CPU models for MIPS64 hosts
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The following CPU models are supported for use on MIPS64 hosts.
+Administrators / applications are recommended to use the CPU model that
+matches the generation of the host CPUs in use. In a deployment with a
+mixture of host CPU models between machines, if live migration
+compatibility is required, use the newest CPU model that is compatible
+across all desired hosts.
+
+``I6400``
+ MIPS64 Processor (Release 6, 2014)
+
+``Loongson-2F``
+ MIPS64 Processor (Loongson 2, 2008)
+
+``Loongson-2E``
+ MIPS64 Processor (Loongson 2, 2006)
+
+``mips64dspr2``
+ MIPS64 Processor (Release 2, 2006)
+
+``MIPS64R2-generic``, ``5KEc``, ``5KEf``
+ MIPS64 Processor (Release 2, 2002)
+
+``20Kc``
+ MIPS64 Processor (20K, 2000
+
+``5Kc``, ``5Kf``
+ MIPS64 Processor (5K, 1999)
+
+``VR5432``
+ MIPS64 Processor (VR, 1998)
+
+``R4000``
+ MIPS64 Processor (MIPS III, 1991)
+
+
+Supported CPU models for nanoMIPS hosts
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The following CPU models are supported for use on nanoMIPS hosts.
+Administrators / applications are recommended to use the CPU model that
+matches the generation of the host CPUs in use. In a deployment with a
+mixture of host CPU models between machines, if live migration
+compatibility is required, use the newest CPU model that is compatible
+across all desired hosts.
+
+``I7200``
+ MIPS I7200 (nanoMIPS, 2018)
+
+Preferred CPU models for MIPS hosts
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The following CPU models are preferred for use on different MIPS hosts:
+
+``MIPS III``
+ R4000
+
+``MIPS32R2``
+ 34Kf
+
+``MIPS64R6``
+ I6400
+
+``nanoMIPS``
+ I7200
+