diff options
author | Dr. David Alan Gilbert <dgilbert@redhat.com> | 2019-11-04 18:52:02 +0000 |
---|---|---|
committer | Laurent Vivier <laurent@vivier.eu> | 2019-11-06 17:19:40 +0100 |
commit | df59feb197cda31a8b807c13bf509259db9e018f (patch) | |
tree | b4b7e303da46615f35630214f3be9ac76f040c37 /docs/specs | |
parent | 0fbe394a64ac9ceb13a98f43d078cd48d3006498 (diff) |
global: Squash 'the the'
'the' has a tendency to double up; squash them back down.
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20191104185202.102504-1-dgilbert@redhat.com>
[lv: removed disas/libvixl/vixl/invalset.h change]
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'docs/specs')
-rw-r--r-- | docs/specs/ppc-spapr-hotplug.txt | 2 | ||||
-rw-r--r-- | docs/specs/ppc-xive.rst | 2 | ||||
-rw-r--r-- | docs/specs/tpm.txt | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/docs/specs/ppc-spapr-hotplug.txt b/docs/specs/ppc-spapr-hotplug.txt index cc7833108e..859d52cce6 100644 --- a/docs/specs/ppc-spapr-hotplug.txt +++ b/docs/specs/ppc-spapr-hotplug.txt @@ -385,7 +385,7 @@ Each LMB list entry consists of the following elements: is used to retrieve the right associativity list to be used for this LMB. - A 32bit flags word. The bit at bit position 0x00000008 defines whether - the LMB is assigned to the the partition as of boot time. + the LMB is assigned to the partition as of boot time. ibm,dynamic-memory-v2 diff --git a/docs/specs/ppc-xive.rst b/docs/specs/ppc-xive.rst index 148d57eb6a..83d43f658b 100644 --- a/docs/specs/ppc-xive.rst +++ b/docs/specs/ppc-xive.rst @@ -163,7 +163,7 @@ Interrupt Priority Register (PIPR) is also updated using the IPB. This register represent the priority of the most favored pending notification. -The PIPR is then compared to the the Current Processor Priority +The PIPR is then compared to the Current Processor Priority Register (CPPR). If it is more favored (numerically less than), the CPU interrupt line is raised and the EO bit of the Notification Source Register (NSR) is updated to notify the presence of an exception for diff --git a/docs/specs/tpm.txt b/docs/specs/tpm.txt index 5d8c26b1ad..9c8cca042d 100644 --- a/docs/specs/tpm.txt +++ b/docs/specs/tpm.txt @@ -89,7 +89,7 @@ TPM upon reboot. The PPI specification defines the operation requests and the actions the firmware has to take. The system administrator passes the operation request number to the firmware through an ACPI interface which writes this number to a memory location that the firmware knows. Upon reboot, the firmware -finds the number and sends commands to the the TPM. The firmware writes the TPM +finds the number and sends commands to the TPM. The firmware writes the TPM result code and the operation request number to a memory location that ACPI can read from and pass the result on to the administrator. |