diff options
| author | Cédric Le Goater <clg@kaod.org> | 2019-06-12 18:04:25 +0200 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2019-07-02 09:43:58 +1000 |
| commit | b87a0100cde349a977a19969660660bcb84720be (patch) | |
| tree | f79567a5314e7306ea7036828ee7e86b3731be77 /docs/specs/ppc-xive.rst | |
| parent | fad189d1f6c2919dbde5433c6c15548eefef75e8 (diff) | |
docs: updates on the POWER9 XIVE interrupt controller documentation
This includes various small updates and a better description of the
chosen interrupt mode resulting from the combination of the 'ic-mode'
machine option, the 'kernel_irqchip' option, guest support and KVM
support.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20190612160425.27670-1-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'docs/specs/ppc-xive.rst')
| -rw-r--r-- | docs/specs/ppc-xive.rst | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/docs/specs/ppc-xive.rst b/docs/specs/ppc-xive.rst index b997dc0629..148d57eb6a 100644 --- a/docs/specs/ppc-xive.rst +++ b/docs/specs/ppc-xive.rst @@ -20,10 +20,11 @@ The XIVE IC is composed of three sub-engines, each taking care of a processing layer of external interrupts: - Interrupt Virtualization Source Engine (IVSE), or Source Controller - (SC). These are found in PCI PHBs, in the PSI host bridge - controller, but also inside the main controller for the core IPIs - and other sub-chips (NX, CAP, NPU) of the chip/processor. They are - configured to feed the IVRE with events. + (SC). These are found in PCI PHBs, in the Processor Service + Interface (PSI) host bridge Controller, but also inside the main + controller for the core IPIs and other sub-chips (NX, CAP, NPU) of + the chip/processor. They are configured to feed the IVRE with + events. - Interrupt Virtualization Routing Engine (IVRE) or Virtualization Controller (VC). It handles event coalescing and perform interrupt routing by matching an event source number with an Event |