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authorAndrew Jones <drjones@redhat.com>2021-08-23 18:06:47 +0200
committerPeter Maydell <peter.maydell@linaro.org>2021-08-26 17:01:59 +0100
commit022707e5d617de2811d9447887ce67e187258613 (patch)
tree842bd6a4af59102ed8ec532b9cd5ab549d85ab90 /docs/specs/index.rst
parent5b65e5abeacae691cd13f1dadf7666e63d8b48a6 (diff)
target/arm/cpu64: Validate sve vector lengths are supported
Future CPU types may specify which vector lengths are supported. We can apply nearly the same logic to validate those lengths as we do for KVM's supported vector lengths. We merge the code where we can, but unfortunately can't completely merge it because KVM requires all vector lengths, power-of-two or not, smaller than the maximum enabled length to also be enabled. The architecture only requires all the power-of-two lengths, though, so TCG will only enforce that. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210823160647.34028-5-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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