diff options
| author | Like Xu <like.xu@linux.intel.com> | 2019-02-20 13:27:26 +0800 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2019-03-06 10:40:21 +0100 |
| commit | 806be3734c3c55357f15ab6548df86433f81859f (patch) | |
| tree | ba9f4e26502a7adf0e36f883fcbd3ec2b028cd70 /docs/qemu-cpu-models.texi | |
| parent | d80cf1eb2e87df3a9bfb226bcc7fb3a1aa858817 (diff) | |
doc: fix typos for documents in tree
Signed-off-by: Like Xu <like.xu@linux.intel.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-Id: <1550640446-18788-1-git-send-email-like.xu@linux.intel.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'docs/qemu-cpu-models.texi')
| -rw-r--r-- | docs/qemu-cpu-models.texi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/docs/qemu-cpu-models.texi b/docs/qemu-cpu-models.texi index 475d434d52..1b72584161 100644 --- a/docs/qemu-cpu-models.texi +++ b/docs/qemu-cpu-models.texi @@ -49,7 +49,7 @@ live migration safe. The information that follows provides recommendations for configuring CPU models on x86 hosts. The goals are to maximise performance, while protecting guest OS against various CPU hardware flaws, and optionally -enabling live migration between hosts with hetergeneous CPU models. +enabling live migration between hosts with heterogeneous CPU models. @menu * preferred_cpu_models_intel_x86:: Preferred CPU models for Intel x86 hosts @@ -287,7 +287,7 @@ Must be explicitly turned on for all AMD CPU models. This provides higher performance than virt-ssbd so should be exposed to guests whenever available in the host. virt-ssbd should none the less also be exposed for maximum guest -compatability as some kernels only know about virt-ssbd. +compatibility as some kernels only know about virt-ssbd. @item @code{amd-no-ssb} @@ -296,7 +296,7 @@ Recommended to indicate the host is not vulnerable CVE-2018-3639 Not included by default in any AMD CPU model. -Future hardware genarations of CPU will not be vulnerable to +Future hardware generations of CPU will not be vulnerable to CVE-2018-3639, and thus the guest should be told not to enable its mitigations, by exposing amd-no-ssb. This is mutually exclusive with virt-ssbd and amd-ssbd. @@ -451,7 +451,7 @@ MIPS64 Processor (Release 6, 2014) @item @code{Loongson-2F} -MIPS64 Processor (Longsoon 2, 2008) +MIPS64 Processor (Loongson 2, 2008) @item @code{Loongson-2E} |