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authorJean-Philippe Brucker <jean-philippe@linaro.org>2023-12-19 17:57:50 +0000
committerMichael Tokarev <mjt@tls.msk.ru>2023-12-20 19:07:05 +0300
commitc06aef082f21d897c1f929b10f6ab0800a54be26 (patch)
treeb6117050fc9fd3a2be52ea05d778c4b940533660 /docs/pcie_sriov.txt
parent5b2fd6cf37352d671db09b54e4bc9d2ce707ca6d (diff)
target/arm/helper: Propagate MDCR_EL2.HPMN into PMCR_EL0.N
MDCR_EL2.HPMN allows an hypervisor to limit the number of PMU counters available to EL1 and EL0 (to keep the others to itself). QEMU already implements this split correctly, except for PMCR_EL0.N reads: the number of counters read by EL1 or EL0 should be the one configured in MDCR_EL2.HPMN. Cc: qemu-stable@nongnu.org Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Message-id: 20231215144652.4193815-2-jean-philippe@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> (cherry picked from commit 6980c31dec42b6daebf7fec13b2d39ed87bb4766) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'docs/pcie_sriov.txt')
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