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| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2014-01-06 10:16:39 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-01-08 19:07:21 +0000 |
| commit | 11a239a51ccbf27a22e2aa5f423ff1d6f5df65a7 (patch) | |
| tree | 0a6aa44475858b141a783d52f887db6332f358cc /docs/libcacard.txt | |
| parent | 676f4c095d53841626b1ee2cbc7a53b4f6239e4e (diff) | |
char/cadence_uart: Define Missing SR/ISR fields
Some (interrupt) status register bits relating to the TxFIFO path were
not defined. Define them. This prepares support for proper Tx data path
flow control.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 2068b963f0af8cc834c353944e9fa816d950b163.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs/libcacard.txt')
0 files changed, 0 insertions, 0 deletions