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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-03-09 21:58:18 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-03-12 11:20:20 +0000 |
| commit | 6fe6d6c9a953901251e1a85088f0a61ff5caf648 (patch) | |
| tree | 1a6fd6d7c792d6bcebe4313d1795f3b4c4eac047 /docs/devel/loads-stores.rst | |
| parent | 34f18ab14d7197d13d7e93300e3b9a3853c7efc8 (diff) | |
docs: Be consistent about capitalization of 'Arm'
The company 'Arm' went through a rebranding some years back
involving a recapitalization from 'ARM' to 'Arm'. As a result
our documentation is a bit inconsistent between the two forms.
It's not worth trying to update everywhere in QEMU, but it's
easy enough to make docs/ consistent.
Note that "ARMv8" and similar architecture names, and
older CPU names like "ARM926" still retain all-caps.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Message-id: 20200309215818.2021-6-peter.maydell@linaro.org
Diffstat (limited to 'docs/devel/loads-stores.rst')
| -rw-r--r-- | docs/devel/loads-stores.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst index 03aa9e7ff8..0d99eb24c1 100644 --- a/docs/devel/loads-stores.rst +++ b/docs/devel/loads-stores.rst @@ -302,7 +302,7 @@ way QEMU defines the view of memory that a device or CPU has. or bus fabric.) Each CPU has an AddressSpace. Some kinds of CPU have more than -one AddressSpace (for instance ARM guest CPUs have an AddressSpace +one AddressSpace (for instance Arm guest CPUs have an AddressSpace for the Secure world and one for NonSecure if they implement TrustZone). Devices which can do DMA-type operations should generally have an AddressSpace. There is also a "system address space" which typically |