aboutsummaryrefslogtreecommitdiff
path: root/docs/about
diff options
context:
space:
mode:
authorRichard Henderson <richard.henderson@linaro.org>2021-10-23 14:30:10 -0700
committerRichard Henderson <richard.henderson@linaro.org>2021-10-23 14:30:10 -0700
commitc5b2f559814104f4145f8bc310f4d33c7ead8f49 (patch)
treeed341703165aae6d2fdafa405ffc9d4aa69f5f52 /docs/about
parent660efed8b37aedec9b5fcc555da1f88f7d12c98a (diff)
parent2c92be50bcfa8b7529a39fc99078ef14dcfc71aa (diff)
Merge remote-tracking branch 'remotes/vivier/tags/trivial-branch-for-6.2-pull-request' into staging
Trivial patches pull request 20211023 # gpg: Signature made Sat 23 Oct 2021 11:30:42 AM PDT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] * remotes/vivier/tags/trivial-branch-for-6.2-pull-request: analyze-migration.py: fix extract contents ('-x') errors analyze-migration.py: fix a long standing typo README: Fix some documentation URLs hw/nvram: Fix Memory Leak in Xilinx ZynqMP eFuse device hw/nvram: Fix Memory Leak in Xilinx Versal eFuse device hw/nvram: Fix Memory Leak in Xilinx eFuse QOM softmmu/physmem.c: Fix typo in comment MAINTAINERS: Add myself as reviewer of 'Machine core' API disas/nios2: Simplify endianess conversion disas/nios2: Fix style in print_insn_nios2() po: update turkish translation Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'docs/about')
0 files changed, 0 insertions, 0 deletions