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authorMax Chou <max.chou@sifive.com>2023-10-26 23:18:19 +0800
committerAlistair Francis <alistair.francis@wdc.com>2023-11-07 11:06:02 +1000
commit434c609bef445e0dd13d514c5b12f8e47a73cd1d (patch)
tree10e5777be67f8c75e16ee8e4e6aead7431a8b4da /disas
parentea363626ff65b2b8e6c590812f89546d5779612f (diff)
disas/riscv: Add rv_codec_vror_vi for vror.vi
Add rv_codec_vror_vi for the vector crypto instruction - vror.vi. The rotate amount of vror.vi is defined by combining seperated bits. Signed-off-by: Max Chou <max.chou@sifive.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20231026151828.754279-13-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'disas')
-rw-r--r--disas/riscv.c14
-rw-r--r--disas/riscv.h1
2 files changed, 14 insertions, 1 deletions
diff --git a/disas/riscv.c b/disas/riscv.c
index 8e89e1d115..ec33e447f5 100644
--- a/disas/riscv.c
+++ b/disas/riscv.c
@@ -4011,6 +4011,12 @@ static uint32_t operand_vzimm10(rv_inst inst)
return (inst << 34) >> 54;
}
+static uint32_t operand_vzimm6(rv_inst inst)
+{
+ return ((inst << 37) >> 63) << 5 |
+ ((inst << 44) >> 59);
+}
+
static uint32_t operand_bs(rv_inst inst)
{
return (inst << 32) >> 62;
@@ -4393,6 +4399,12 @@ static void decode_inst_operands(rv_decode *dec, rv_isa isa)
dec->imm = operand_vimm(inst);
dec->vm = operand_vm(inst);
break;
+ case rv_codec_vror_vi:
+ dec->rd = operand_rd(inst);
+ dec->rs2 = operand_rs2(inst);
+ dec->imm = operand_vzimm6(inst);
+ dec->vm = operand_vm(inst);
+ break;
case rv_codec_vsetvli:
dec->rd = operand_rd(inst);
dec->rs1 = operand_rs1(inst);
@@ -4677,7 +4689,7 @@ static void format_inst(char *buf, size_t buflen, size_t tab, rv_decode *dec)
append(buf, tmp, buflen);
break;
case 'u':
- snprintf(tmp, sizeof(tmp), "%u", ((uint32_t)dec->imm & 0b11111));
+ snprintf(tmp, sizeof(tmp), "%u", ((uint32_t)dec->imm & 0b111111));
append(buf, tmp, buflen);
break;
case 'j':
diff --git a/disas/riscv.h b/disas/riscv.h
index b242d73b25..19e5ed2ce6 100644
--- a/disas/riscv.h
+++ b/disas/riscv.h
@@ -152,6 +152,7 @@ typedef enum {
rv_codec_v_i,
rv_codec_vsetvli,
rv_codec_vsetivli,
+ rv_codec_vror_vi,
rv_codec_zcb_ext,
rv_codec_zcb_mul,
rv_codec_zcb_lb,