diff options
| author | Balaji Ravikumar <bravikumar@rivosinc.com> | 2024-07-05 17:53:16 +0100 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-07-18 12:08:44 +1000 |
| commit | 4d46d84ea7fbb694125b95c88e788caf6cd039fa (patch) | |
| tree | 4a207cb3fc66fd1d7cea6907d8343e5953e79fcb /disas | |
| parent | 910c18a91738f9b77c5faf66e3534bb10d6e306e (diff) | |
disas/riscv: Add decode for Zawrs extension
Add disassembly support for these instructions from Zawrs:
* wrs.sto
* wrs.nto
Signed-off-by: Balaji Ravikumar <bravikumar@rivosinc.com>
Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240705165316.127494-1-rbradford@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'disas')
| -rw-r--r-- | disas/riscv.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/disas/riscv.c b/disas/riscv.c index c8364c2b07..5965574d87 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -974,6 +974,8 @@ typedef enum { rv_op_amomaxu_h = 943, rv_op_amocas_b = 944, rv_op_amocas_h = 945, + rv_op_wrs_sto = 946, + rv_op_wrs_nto = 947, } rv_op; /* register names */ @@ -2232,6 +2234,8 @@ const rv_opcode_data rvi_opcode_data[] = { { "amomaxu.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, { "amocas.b", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, { "amocas.h", rv_codec_r_a, rv_fmt_aqrl_rd_rs2_rs1, NULL, 0, 0, 0 }, + { "wrs.sto", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, + { "wrs.nto", rv_codec_none, rv_fmt_none, NULL, 0, 0, 0 }, }; /* CSR names */ @@ -3980,6 +3984,8 @@ static void decode_inst_opcode(rv_decode *dec, rv_isa isa) case 0: op = rv_op_ecall; break; case 32: op = rv_op_ebreak; break; case 64: op = rv_op_uret; break; + case 416: op = rv_op_wrs_nto; break; + case 928: op = rv_op_wrs_sto; break; } break; case 256: |