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authorAlex Bennée <alex.bennee@linaro.org>2020-02-28 19:24:13 +0000
committerRichard Henderson <richard.henderson@linaro.org>2020-02-28 17:42:48 -0800
commit47a2def4533a2807e48954abd50b32ecb1aaf29a (patch)
tree647c0792d312df8c6f748c86ef7416312e2bae93 /disas/sparc.c
parenta2fa63a8f57b6294009f3db198fa841139051c56 (diff)
accel/tcg: remove link between guest ram and TCG cache size
Basing the TB cache size on the ram_size was always a little heuristic and was broken by a1b18df9a4 which caused ram_size not to be fully realised at the time we initialise the TCG translation cache. The current DEFAULT_CODE_GEN_BUFFER_SIZE may still be a little small but follow-up patches will address that. Fixes: a1b18df9a4 Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-Id: <20200228192415.19867-3-alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'disas/sparc.c')
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