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| author | Leon Alrae <leon.alrae@imgtec.com> | 2014-06-27 08:49:01 +0100 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2014-10-13 12:38:24 +0100 |
| commit | 4368b29a26ebd13db95325b3511c0157ea9826f0 (patch) | |
| tree | 613d5c7b25c7cf8dc78bb7b1332b48f0f4f88b2f /disas/mips.c | |
| parent | b691d9d2a0c13ad27df44964f6fdd34d5f259607 (diff) | |
target-mips: move LL and SC instructions
The encoding of LL and SC instruction has changed in MIPS32 Release 6.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Diffstat (limited to 'disas/mips.c')
| -rw-r--r-- | disas/mips.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/disas/mips.c b/disas/mips.c index b950e539e8..f0efa8b29c 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -119,6 +119,8 @@ see <http://www.gnu.org/licenses/>. */ #define OP_SH_IMMEDIATE 0 #define OP_MASK_DELTA 0xffff #define OP_SH_DELTA 0 +#define OP_MASK_DELTA_R6 0x1ff +#define OP_SH_DELTA_R6 7 #define OP_MASK_FUNCT 0x3f #define OP_SH_FUNCT 0 #define OP_MASK_SPEC 0x3f @@ -1215,6 +1217,8 @@ const struct mips_opcode mips_builtin_opcodes[] = them first. The assemblers uses a hash table based on the instruction name anyhow. */ /* name, args, match, mask, pinfo, membership */ +{"ll", "t,o(b)", 0x7c000036, 0xfc00007f, LDD|RD_b|WR_t, 0, I32R6}, +{"sc", "t,o(b)", 0x7c000026, 0xfc00007f, LDD|RD_b|WR_t, 0, I32R6}, {"seleqz", "d,v,t", 0x00000035, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I32R6}, {"selnez", "d,v,t", 0x00000037, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I32R6}, {"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, 0, I4|I32|G3 }, @@ -3734,7 +3738,10 @@ print_insn_args (const char *d, case 'j': /* Same as i, but sign-extended. */ case 'o': - delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA; + delta = (opp->membership == I32R6) ? + (l >> OP_SH_DELTA_R6) & OP_MASK_DELTA_R6 : + (l >> OP_SH_DELTA) & OP_MASK_DELTA; + if (delta & 0x8000) delta |= ~0xffff; (*info->fprintf_func) (info->stream, "%d", |