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author | Igor Mammedov <imammedo@redhat.com> | 2020-10-06 11:00:02 -0400 |
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committer | Eduardo Habkost <ehabkost@redhat.com> | 2020-10-06 11:09:41 -0400 |
commit | 1b5e843ab68c4afa611da22f303a5b0daa979ad8 (patch) | |
tree | 3fd216b072074a64b8273591d1aa5d643df8a8dd /device_tree.c | |
parent | eb4c9775089f355db9cb6292a947aa5cba6c380b (diff) |
numa: hmat: require parent cache description before the next level one
Spec[1] defines 0 - 3 level memory side cache, however QEMU
CLI allows to specify an intermediate cache level without
specifying previous level. Such option(s) silently ignored
when building HMAT table, which leads to incomplete cache
information.
Make sure that previous level exists and error out
if it hasn't been provided.
1) ACPI 6.2A 5.2.27.5 Memory Side Cache Information Structure
Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1842877
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <20201006150002.1601845-1-imammedo@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'device_tree.c')
0 files changed, 0 insertions, 0 deletions