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authorRichard Henderson <rth@twiddle.net>2016-08-31 10:48:03 -0700
committerRichard Henderson <rth@twiddle.net>2016-10-31 14:46:47 -0600
commitcb21b4da6cca1bb4e3f5fefb698fb9e4d00c8f66 (patch)
tree95a723b84dc504bacfe90ac377d2668f2632744a /device_tree.c
parentf939ffe5a022a8798824e2720ed5a14186fca6b6 (diff)
target-sparc: Allow 4-byte alignment on fp mem ops
The cpu is allowed to require stricter alignment on these 8- and 16-byte operations, and the OS is required to fix up the accesses as necessary, so the previous code was not wrong. However, we can easily handle this misalignment for all direct 8-byte operations and for direct 16-byte loads. We must retain 16-byte alignment for 16-byte stores, so that we don't have to probe for writability of a second page before performing the first of two 8-byte stores. We also retain 8-byte alignment for no-fault loads, since they are rare and it's not worth extending the helpers for this. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'device_tree.c')
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