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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-11-02 14:19:12 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-11-02 14:10:53 +0000
commitb89de436ff63218d31122b2176f7785b0628b3c6 (patch)
treedc2a6720ab32385c4c5549494d9044dcd2f98cad /default-configs
parent0f8d06f16c9d1041d728d09d464462ebe713c662 (diff)
hw/arm: versal: Add a model of Xilinx Versal SoC
Add a model of Xilinx Versal SoC. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20181102131913.1535-2-edgar.iglesias@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'default-configs')
-rw-r--r--default-configs/aarch64-softmmu.mak1
1 files changed, 1 insertions, 0 deletions
diff --git a/default-configs/aarch64-softmmu.mak b/default-configs/aarch64-softmmu.mak
index 6f790f061a..4ea9add003 100644
--- a/default-configs/aarch64-softmmu.mak
+++ b/default-configs/aarch64-softmmu.mak
@@ -8,4 +8,5 @@ CONFIG_DDC=y
CONFIG_DPCD=y
CONFIG_XLNX_ZYNQMP=y
CONFIG_XLNX_ZYNQMP_ARM=y
+CONFIG_XLNX_VERSAL=y
CONFIG_ARM_SMMUV3=y