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authorPeter Crosthwaite <peter.crosthwaite@xilinx.com>2015-05-14 19:22:58 -0700
committerPeter Maydell <peter.maydell@linaro.org>2015-05-18 16:41:09 +0100
commitf0a902f76452211cadbdf1d25ef9b94732b096e8 (patch)
tree6ed7d0f42e8538857fa0a6d3a3418a6cdf5fe0ab /default-configs/sparc64-linux-user.mak
parente35310260ec57d20301c65a5714ca55369e971cc (diff)
arm: Introduce Xilinx ZynqMP SoC
With quad Cortex-A53 CPUs. Use SMC PSCI, with the standard policy of secondaries starting in power-off. Tested-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: a16202a6c7b79e446e5289d38cb18d2ee4b897a0.1431381507.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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