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authorCédric Le Goater <clg@kaod.org>2016-06-06 16:59:29 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-06-06 16:59:29 +0100
commit1602001195dca96aaea8b16f740ac860238555a5 (patch)
tree598619a9c48c27024281e8e8309deed429dcfa2d /default-configs/sparc-softmmu.mak
parentfea8a08e1691a22cdf379dfb32ac3e64648c72b7 (diff)
i2c: add aspeed i2c controller
The Aspeed AST2400 integrates a set of 14 I2C/SMBus bus controllers directly connected to the APB bus. They can be programmed as master or slave but the propopsed model only supports the master mode. On the TODO list, we also have : - improve and harden the state machine. - bus recovery support (used by the Linux driver). - transfer mode state machine bits. this is not strictly necessary as it is mostly used for debug. The bus busy bit is deducted from the I2C core engine of qemu. - support of the pool buffer: 2048 bytes of internal SRAM (not used by the Linux driver). Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1464704307-25178-1-git-send-email-clg@kaod.org [PMM: removed unused functions aspeed_i2c_bus_get_state() and aspeed_i2c_bus_set_state()] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'default-configs/sparc-softmmu.mak')
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