diff options
author | Andreas Färber <afaerber@suse.de> | 2013-09-03 13:59:37 +0200 |
---|---|---|
committer | Andreas Färber <afaerber@suse.de> | 2014-03-13 19:52:47 +0100 |
commit | 0c591eb0a9d0593d71d7cb61f4184222ac14fdd2 (patch) | |
tree | 27fc876065b6ed65266b3615a424e6e2cafdfd30 /cputlb.c | |
parent | 00c8cb0a36f51a6866a83c08962d12a0eb21864b (diff) |
cputlb: Change tlb_set_page() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'cputlb.c')
-rw-r--r-- | cputlb.c | 4 |
1 files changed, 2 insertions, 2 deletions
@@ -221,10 +221,11 @@ static void tlb_add_large_page(CPUArchState *env, target_ulong vaddr, /* Add a new TLB entry. At most one entry for a given virtual address is permitted. Only a single TARGET_PAGE_SIZE region is mapped, the supplied size is only used by tlb_flush_page. */ -void tlb_set_page(CPUArchState *env, target_ulong vaddr, +void tlb_set_page(CPUState *cpu, target_ulong vaddr, hwaddr paddr, int prot, int mmu_idx, target_ulong size) { + CPUArchState *env = cpu->env_ptr; MemoryRegionSection *section; unsigned int index; target_ulong address; @@ -232,7 +233,6 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr, uintptr_t addend; CPUTLBEntry *te; hwaddr iotlb, xlat, sz; - CPUState *cpu = ENV_GET_CPU(env); assert(size >= TARGET_PAGE_SIZE); if (size != TARGET_PAGE_SIZE) { |