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| author | Max Filippov <jcmvbkbc@gmail.com> | 2014-09-17 21:13:09 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2014-11-03 00:51:43 +0300 |
| commit | 20303e42d4726018ee64798b4d3051cbe6eea9f8 (patch) | |
| tree | 2fad250b25d4cae8f80c7f7ccea72afad31c60bb /cputlb.c | |
| parent | dec71d2d63b766136d5b6ded616dcc3fae18e97d (diff) | |
target-xtensa: tests: pre-process tests linker script
Xtensa cores have configurable interrupt vectors and endiannes. This
information is needed to link executable images correctly for a specific
core configuration. Instead of hard-coding dc232 defaults pull endianness,
number of high-priority interrupts and location of vectors from the core
configuration and pass it through the C preprocessor.
While at it clean up tabs and align the initial stack on 16 bytes.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'cputlb.c')
0 files changed, 0 insertions, 0 deletions