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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2003-06-25 16:16:50 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2003-06-25 16:16:50 +0000
commitea041c0e3375801694610250a8cc3e1240e2ad87 (patch)
treed26a3de41befc816f5d25a45e599d10c4daabb86 /cpu-i386.h
parent83479e770d31e171232a82f4eee7dab06d3b219c (diff)
more precise cpu_interrupt()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@276 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'cpu-i386.h')
-rw-r--r--cpu-i386.h5
1 files changed, 2 insertions, 3 deletions
diff --git a/cpu-i386.h b/cpu-i386.h
index abbb037235..6c7afbf6e2 100644
--- a/cpu-i386.h
+++ b/cpu-i386.h
@@ -251,7 +251,7 @@ typedef struct CPUX86State {
int error_code;
int exception_is_int;
int exception_next_eip;
-
+ struct TranslationBlock *current_tb; /* currently executing TB */
uint32_t cr[5]; /* NOTE: cr1 is unused */
uint32_t dr[8]; /* debug registers */
int interrupt_request; /* if true, will exit from cpu_exec() ASAP */
@@ -259,7 +259,7 @@ typedef struct CPUX86State {
request interrupt number */
int hard_interrupt_request;
int user_mode_only; /* user mode only simulation */
-
+
/* user data */
void *opaque;
} CPUX86State;
@@ -295,7 +295,6 @@ int cpu_x86_signal_handler(int host_signum, struct siginfo *info,
/* MMU defines */
void cpu_x86_init_mmu(CPUX86State *env);
-extern CPUX86State *global_env;
extern int phys_ram_size;
extern int phys_ram_fd;
extern uint8_t *phys_ram_base;