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| author | Anthony Liguori <aliguori@us.ibm.com> | 2012-03-19 08:51:50 -0500 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2012-03-19 08:51:50 -0500 |
| commit | b8b3e75609bd39a085db7612cb7d36a1944eed23 (patch) | |
| tree | 781cb4f785d6c33ee5bb8936419ab2db48e7bec6 /cpu-exec.c | |
| parent | 5c20f4e54a311620861c659dec29d0ee402e8b93 (diff) | |
| parent | 32b089808f125470b3563bf4209c2301fa35c58e (diff) | |
Merge remote-tracking branch 'qemu-kvm/memory/urgent' into staging
* qemu-kvm/memory/urgent: (42 commits)
memory: check for watchpoints when getting code ram_addr
exec: fix write tlb entry misused as iotlb
Sparc: avoid AREG0 wrappers for memory access helpers
Sparc: avoid AREG0 for memory access helpers
TCG: add 5 arg helpers to def-helper.h
softmmu templates: optionally pass CPUState to memory access functions
i386: Remove REGPARM
sparc64: implement PCI and ISA irqs
sparc: reset CPU state on reset
apb: use normal PCI device header for PBM device
w64: Fix data type of next_tb and tcg_qemu_tb_exec
softfloat: fix for C99
vmstate: fix varrays with uint32_t indexes
Fix large memory chunks allocation with tcg_malloc.
hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within region
hw/pxa2xx_lcd.c: drop target_phys_addr_t usage in device state
hw/pxa2xx_dma.c: drop target_phys_addr_t usage in device state
ARM: Remove unnecessary subpage workarounds
malta: Fix display for LED array
malta: Use symbolic hardware addresses
...
Diffstat (limited to 'cpu-exec.c')
| -rw-r--r-- | cpu-exec.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/cpu-exec.c b/cpu-exec.c index bd5791f8fa..0fa8325b27 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -55,7 +55,7 @@ void cpu_resume_from_signal(CPUArchState *env, void *puc) static void cpu_exec_nocache(CPUArchState *env, int max_cycles, TranslationBlock *orig_tb) { - unsigned long next_tb; + tcg_target_ulong next_tb; TranslationBlock *tb; /* Should never happen. @@ -186,7 +186,7 @@ int cpu_exec(CPUArchState *env) int ret, interrupt_request; TranslationBlock *tb; uint8_t *tc_ptr; - unsigned long next_tb; + tcg_target_ulong next_tb; if (env->halted) { if (!cpu_has_work(env)) { @@ -565,7 +565,7 @@ int cpu_exec(CPUArchState *env) if ((next_tb & 3) == 2) { /* Instruction counter expired. */ int insns_left; - tb = (TranslationBlock *)(long)(next_tb & ~3); + tb = (TranslationBlock *)(next_tb & ~3); /* Restore PC. */ cpu_pc_from_tb(env, tb); insns_left = env->icount_decr.u32; |