diff options
author | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2014-09-01 12:59:46 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2014-09-01 14:49:20 +0100 |
commit | 48e06fe0ed8c265336bb7320c3a294fd0d082c04 (patch) | |
tree | eae76ba03a3b3809a3675c2ce2e237cc9f334ee2 /cpu-exec.c | |
parent | 5cd1475d28fc6e3d617e6cc47ab7c8050cf7fa40 (diff) |
target-tricore: Add target stubs and qom-cpu
Add TriCore target stubs, and QOM cpu, and Maintainer
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-id: 1409572800-4116-2-git-send-email-kbastian@mail.uni-paderborn.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'cpu-exec.c')
-rw-r--r-- | cpu-exec.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/cpu-exec.c b/cpu-exec.c index c6aad742e1..7b5d2e21d0 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -387,6 +387,7 @@ int cpu_exec(CPUArchState *env) #elif defined(TARGET_CRIS) #elif defined(TARGET_S390X) #elif defined(TARGET_XTENSA) +#elif defined(TARGET_TRICORE) /* XXXXX */ #else #error unsupported target CPU @@ -444,7 +445,8 @@ int cpu_exec(CPUArchState *env) } #if defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_MIPS) || \ defined(TARGET_PPC) || defined(TARGET_ALPHA) || defined(TARGET_CRIS) || \ - defined(TARGET_MICROBLAZE) || defined(TARGET_LM32) || defined(TARGET_UNICORE32) + defined(TARGET_MICROBLAZE) || defined(TARGET_LM32) || \ + defined(TARGET_UNICORE32) || defined(TARGET_TRICORE) if (interrupt_request & CPU_INTERRUPT_HALT) { cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; cpu->halted = 1; @@ -560,6 +562,12 @@ int cpu_exec(CPUArchState *env) cc->do_interrupt(cpu); next_tb = 0; } +#elif defined(TARGET_TRICORE) + if ((interrupt_request & CPU_INTERRUPT_HARD)) { + cc->do_interrupt(cpu); + next_tb = 0; + } + #elif defined(TARGET_OPENRISC) { int idx = -1; @@ -846,6 +854,7 @@ int cpu_exec(CPUArchState *env) | env->cc_dest | (env->cc_x << 4); #elif defined(TARGET_MICROBLAZE) #elif defined(TARGET_MIPS) +#elif defined(TARGET_TRICORE) #elif defined(TARGET_MOXIE) #elif defined(TARGET_OPENRISC) #elif defined(TARGET_SH4) |