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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2003-10-27 21:13:06 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2003-10-27 21:13:06 +0000
commit93a40ea9264dfd5df63669e785fed1c9db0041f4 (patch)
treea2bfd3ce07e66bc95cc692c798a597c163da6a9e /cpu-exec.c
parentdb8d74668856e5bbc6c8fede0bb17c4f83e7debf (diff)
fixed mmu fault priviledge logic
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@406 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'cpu-exec.c')
-rw-r--r--cpu-exec.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/cpu-exec.c b/cpu-exec.c
index 035f104145..956504d827 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -225,7 +225,7 @@ int cpu_exec(CPUState *env1)
cpu_arm_dump_state(env, logfile, 0);
env->cpsr &= ~0xf0000000;
#elif defined(TARGET_SPARC)
- cpu_sparc_dump_state (env, logfile, 0);
+ cpu_sparc_dump_state (env, logfile, 0);
#else
#error unsupported target CPU
#endif
@@ -273,6 +273,7 @@ int cpu_exec(CPUState *env1)
tb->tc_ptr = tc_ptr;
tb->cs_base = (unsigned long)cs_base;
tb->flags = flags;
+ /* XXX: an MMU exception can occur here */
cpu_gen_code(env, tb, CODE_GEN_MAX_SIZE, &code_gen_size);
*ptb = tb;
tb->hash_next = NULL;
@@ -456,7 +457,8 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address,
return 1;
}
/* see if it is an MMU fault */
- ret = cpu_x86_handle_mmu_fault(env, address, is_write);
+ ret = cpu_x86_handle_mmu_fault(env, address, is_write,
+ ((env->hflags & HF_CPL_MASK) == 3), 0);
if (ret < 0)
return 0; /* not an MMU fault */
if (ret == 0)