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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2005-11-28 21:19:04 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2005-11-28 21:19:04 +0000
commit84b7b8e778937f1ec3cbdb8914261a2fe0067ef2 (patch)
treee72030ed083977fca23c33bef2f047e055e3fea8 /cpu-defs.h
parent5cf3839607a6883a16fe65124d2f8f244de0f8ac (diff)
PAGE_EXEC support in TLBs
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1676 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'cpu-defs.h')
-rw-r--r--cpu-defs.h10
1 files changed, 6 insertions, 4 deletions
diff --git a/cpu-defs.h b/cpu-defs.h
index e095f8566f..665158a381 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -80,7 +80,8 @@ typedef unsigned long ram_addr_t;
#define TB_JMP_CACHE_BITS 12
#define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
-#define CPU_TLB_SIZE 256
+#define CPU_TLB_BITS 8
+#define CPU_TLB_SIZE (1 << CPU_TLB_BITS)
typedef struct CPUTLBEntry {
/* bit 31 to TARGET_PAGE_BITS : virtual address
@@ -89,7 +90,9 @@ typedef struct CPUTLBEntry {
bit 3 : indicates that the entry is invalid
bit 2..0 : zero
*/
- target_ulong address;
+ target_ulong addr_read;
+ target_ulong addr_write;
+ target_ulong addr_code;
/* addend to virtual address to get physical address */
target_phys_addr_t addend;
} CPUTLBEntry;
@@ -105,8 +108,7 @@ typedef struct CPUTLBEntry {
target_ulong mem_write_vaddr; /* target virtual addr at which the \
memory was written */ \
/* 0 = kernel, 1 = user */ \
- CPUTLBEntry tlb_read[2][CPU_TLB_SIZE]; \
- CPUTLBEntry tlb_write[2][CPU_TLB_SIZE]; \
+ CPUTLBEntry tlb_table[2][CPU_TLB_SIZE]; \
struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \
\
/* from this point: preserved by CPU reset */ \